Course Unit Profile

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Basic Information


Course Unit Code: 601II

Level of course unit

Second Cycle (Laurea magistrale) Degree Programme in Embedded Computing Systems

Year of study

First year

Semester when the course is delivered


Number of ECTS credits allocated: 12

Name of Lecturer(s):

Prof.: Cosimo antonio Prete

Prof.: Luca Fanucci

Language of instruction


General Information

Learning outcomes

The student who successfully completes the course will be able to demonstrate a solid knowledge of the main issues related to computer architecture and digital systems. The student will understand the high-performance and energy-efficient computer architecture, as a basis for informed software performance engineering and as a foundation for advanced work in computer architecture, compiler design, operating systems and parallel processing. The student will also acquire the ability to master digital integrated circuit design trade-offs according to main performance metrics (area, speed, power consumption and flexibility) by exploiting state-of-the-art electronic design automation tools and high-level design methodologies for FPGA and semi-custom technologies. He or she will acquire the ability to understand sensor based electronic systems including sensor data acquisition, sensor conditioning and sensor data fusion.

Course contents

The course is organized in two parts. The first one covers:
-Classes of computers, technology trends, power consumption, performance, evaluation and benchmarks
-Memory hierarchy, cache and virtual memory
-Instruction Level Parallelism, dynamic scheduling, multiple issue, speculation and multithreading
-Vector architecture, SIMD and Graphics Processing Unit
-Symmetric shared-memory multiprocessors, distributed shared-memory multiprocessor, cache coherence and memory consistency
The second part covers:
-Design metrics and methodologies for digital integrated circuits design including FPGA.
-High-level EDA tools including HW/SW co-design.
-CMOS logic, latch and flop, ALU and MAC, power supply and clock distribution and I/O design.
-Design techniques for reduction of CMOS power consumption
-Sensor data acquisition, compensation and fusion with emphasis on temperature, magnetic and inertial MEMS sensors

Specific Information

Prerequisites, co-requisites, as a prerequisite for further study





Prerequisite for


Mode of delivery


face to face



Teaching methods

Learning activities

Recommended or required reading

Recommended reading includes:

For the computer architecture part:
- Computer Architecture, Fifth Edition: A Quantitative Approach, John L. Hennessy, David A. Patterson.
- Advanced Computer Architecture and Computing, S.S. Jadhav.
- Microprocessor Architecture: From Simple Pipelines to Chip Multiprocessors, Jean-Loup Baer
- Parallel computer organization and design, M. Dubois, M. Annavaram, P. Stenstrom

For the digital system design part:
- J. M. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits 2/E, Prentice-Hall
- K.C. Chang, “Digital Systems Design with VHDL and Synthesis”, IEEE Computer Society

Further materials will be provided by the lecturers.

Assessment methods and criteria

Assessment methods

Assessment criteria

The student will be assessed on his/her demonstrated ability to discuss the main course contents using the appropriate terminology. The student must demonstrate the ability to put into practice and to execute, with critical awareness, the activities illustrated or carried out under the guidance of the teacher during the course. The student could also request to perform a practical design project for one of both parts (computer architecture and digital system design).

Work placement


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